基本解釋

• [計(jì)] 硬件體系結(jié)構(gòu)，[計(jì)] 硬件總體結(jié)構(gòu)

英漢例句

雙語(yǔ)例句

• They disregard hardware architecture as well as other low-level concerns not relevant to programming.
  它們忽視與程序設(shè)計(jì)無(wú)關(guān)的硬件架構(gòu)和其他低層次的關(guān)注。
• The performance of low-level hardware concurrency primitives, like compare-and-swap, differ fairly substantially from one hardware architecture to another.
  至于低級(jí)硬件并發(fā)原語(yǔ)的性能，不同的硬件體系結(jié)構(gòu)之間更是千差萬(wàn)別。
• Keep in mind that AO is an extra-cost licensable component, and only available on 3.8 firmware for XS40 and XI50 appliances built on the 9235 (9004) hardware architecture.
  記住，AO 是需要額外付費(fèi)的許可組件，并且僅能用于構(gòu)建在 9235 (9004) 硬件架構(gòu)之上的 XS40 和 XI50 設(shè)備的 3.8 固件。

權(quán)威例句

• Contrary to widespread concerns, this does not require a single central repository or any other particular hardware architecture.
  ECONOMIST: IT in the health-care industry
• Their software and hardware architecture may take advantage of patterns like redundant services, failover services, or retry attempts after failures.
  FORBES: Website Failures Are Inevitable, But They Need Not Be Ugly
• Hardware architecture, or the lack of it, has played a key role in the rise and fall of many companies.
  FORBES: The Key to Success in Cloud Computing? Good Plumbing

• hardware architecture更多例句

詞組短語(yǔ)

短語(yǔ)

• Windows Hardware Error Architecture 硬件錯(cuò)誤體系結(jié)構(gòu);硬件錯(cuò)誤架構(gòu)
• Computer Hardware and Architecture 計(jì)算機(jī)硬件與結(jié)構(gòu)
• hardware abstraction architecture 硬件抽象體系結(jié)構(gòu)
• Hardware Abstract Architecture 硬件抽象體系結(jié)構(gòu)
• robot hardware architecture 機(jī)器人硬件結(jié)構(gòu)

• hardware architecture更多詞組

專業(yè)釋義

計(jì)算機(jī)科學(xué)技術(shù)

• 硬件結(jié)構(gòu)

  This paper researches the hardware architecture and software modules of PDT.
  本文也給出了PDT的硬件結(jié)構(gòu)與軟件組成。

• 硬件總體結(jié)構(gòu)
• 硬體體系架構(gòu)

電子、通信與自動(dòng)控制技術(shù)

• 硬件結(jié)構(gòu)

  The system hardware architecture is analyzed, and the properties of ADSP2116x and the methodology of software development are presented.
  分析了系統(tǒng)的硬件結(jié)構(gòu)，介紹了ADSP21160的結(jié)構(gòu)特點(diǎn)和軟件設(shè)計(jì)方法。

• 硬件架構(gòu)

  In this paper, we propose a hardware architecture design of AVS motion compensation decoder.
  本文致力于提出一種基于AVS標(biāo)準(zhǔn)的運(yùn)動(dòng)補(bǔ)償解碼器的硬件架構(gòu)設(shè)計(jì)。

• 硬件實(shí)現(xiàn)結(jié)構(gòu)
• 硬件總體結(jié)構(gòu)